Part Number Hot Search : 
C123E SMBJ110 CXT2222A BU2525 7824CT FOD817C 2SB1308 X25041SI
Product Description
Full Text Search
 

To Download LTC1569-61 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 LTC1569-6 Linear Phase, DC Accurate, Low Power, 10th Order Lowpass Filter
FEATURES
s s s s s s s s s s s
One External R Sets Cutoff Frequency Root Raised Cosine Response 3mA Supply Current with a Single 3V Supply Up to 64kHz Cutoff on a Single 3V Supply 10th Order, Linear Phase Filter in an SO-8 DC Accurate, VOS(MAX) = 5mV Low Power Modes Differential or Single-Ended Inputs 80dB CMRR (DC) 82dB Signal-to-Noise Ratio, VS = 5V Operates from 3V to 5V Supplies
tems. Furthermore, its root raised cosine response offers the optimum pulse shaping for PAM data communications. The filter attenuation is 50dB at 1.5 * fCUTOFF, 60dB at 2 * fCUTOFF, and in excess of 80dB at 6 * fCUTOFF. DCaccuracy-sensitive applications benefit from the 5mV maximum DC offset.
APPLICATIO S
s s
s
Data Communication Filters for 3V Operation Linear Phase and Phase Matched Filters for I/Q Signal Processing Pin Programmable Cutoff Frequency Lowpass Filters
DESCRIPTIO
The LTC1569-6 sampled data filter does not require an external clock yet its cutoff frequency can be set with a single external resistor with a typical accuracy of 3.5% or better. The external resistor programs an internal oscillator whose frequency is divided by either 1, 4 or 16 prior to being applied to the filter network. Pin 5 determines the divider setting. Thus, up to three cutoff frequencies can be obtained for each external resistor value. Using various resistor values and divider settings, the cutoff frequency can be programmed over a range of six octaves. Alternatively, the cutoff frequency can be set with an external clock and the clock-to-cutoff frequency ratio is 64:1. The ratio of the internal sampling rate to the filter cutoff frequency is 128:1.
The LTC1569-6 is fully tested for a cutoff frequency of 64kHz with a single 3V supply. The LTC1569-6 features power saving modes and it is available in an SO-8 surface mount package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
The LTC(R)1569-6 is a 10th order lowpass filter featuring linear phase and a root raised cosine amplitude response. The high selectivity of the LTC1569-6 combined with its linear phase in the passband makes it suitable for filtering both in data communications and data acquisition sys-
TYPICAL APPLICATIO
Single 3V Supply, 64kHz/16kHz/4kHz Lowpass Filter
VIN 3V 3.48k 3 2k 1F 4 V- DIV/CLK 5 1/1 1 2 IN + IN - OUT V+ 8 7 VOUT REXT = 10k 1F 6 1/16 1/4 3V GAIN (dB) 3V
LTC1569-6 GND RX
EASY TO SET fCUTOFF: fCUTOFF = 1, 4 OR 16
64kHz (10k/REXT)
1569-6 TA01
U
U
U
Frequency Response, fCUTOFF = 64kHz/16kHz/4kHz
0
-20
-40
-60
-80
100pF
-100
1
10 100 FREQUENCY (kHz)
1000
1569-6 TA01a
1
LTC1569-6 ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW IN + 1 IN - 2 GND 3 V- 4 8 7 6 5 OUT V+ RX DIV/CLK
Total Supply Voltage ................................................ 11V Power Dissipation .............................................. 500mW Operating Temperature LTC1569C ............................................... 0C to 70C LTC1569I ............................................ - 40C to 85C Storage Temperature ............................ - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER LTC1569CS8-6 LTC1569IS8-6 S8 PART MARKING 15696 1569I6
S8 PACKAGE 8-LEAD PLASTIC SO
TJMAX = 125C, JA = 150C/W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 3V (V + = 3V, V - = 0V), fCUTOFF = 64kHz, RLOAD = 10k unless otherwise specified.
PARAMETER Filter Gain CONDITIONS VS = 5V, fCLK = 4.096MHz, fCUTOFF = 64kHz, VIN = 1.4VP-P, REXT = 10k, Pin 5 Shorted to Pin 4 fIN = 1280Hz = 0.02 * fCUTOFF fIN = 12.8kHz = 0.2 * fCUTOFF fIN = 32kHz = 0.5 * fCUTOFF fIN = 51.2kHz = 0.8 * fCUTOFF fIN = 64kHz = fCUTOFF fIN = 97.5kHz = 1.5 * fCUTOFF (LTC1569I) fIN = 97.5kHz = 1.5 * fCUTOFF (LTC1569C) fIN = 128kHz = 2 * fCUTOFF fIN = 192kHz = 3 * fCUTOFF fIN = 312Hz = 0.02 * fCUTOFF fIN = 3125kHz = 0.2 * fCUTOFF fIN = 7812kHz = 0.5 * fCUTOFF fIN = 12.5kHz = 0.8 * fCUTOFF fIN = 15.625kHz = fCUTOFF fIN = 23.44kHz = 1.5 * fCUTOFF (LTC1569I) fIN = 23.44kHz = 1.5 * fCUTOFF (LTC1569C) fIN = 31.25kHz = 2 * fCUTOFF (LTC1569I) fIN = 31.25kHz = 2 * fCUTOFF (LTC1569C) fIN = 46.88kHz = 3 * fCUTOFF fIN = 1250Hz = 0.02 * fCUTOFF fIN = 12.5kHz = 0.2 * fCUTOFF fIN = 31.25kHz = 0.5 * fCUTOFF fIN = 50kHz = 0.8 * fCUTOFF fIN = 62.5kHz = fCUTOFF fIN = 93.75kHz = 1.5 * fCUTOFF
q q q q q q q q q q q q q q q q q q q q q q q
MIN -0.05 - 0.25 - 0.65 - 1.3 - 5.3
TYP 0.05 - 0.15 - 0.55 - 1.0 - 3.8 - 60 - 60 - 62 - 71 0.05 - 0.15 - 0.55 - 0.9 - 3.4 - 54 - 54 - 60 - 60 - 66 -11 - 111 82 - 79 162 - 91 62.5kHz 1% 2.1
MAX 0.15 - 0.05 - 0.4 - 0.7 - 2.4 - 40 - 48 - 50 - 60 0.16 - 0.05 - 0.4 - 0.7 - 3.2 - 48 - 50 - 52 - 55 - 60 -108 85 - 75 168
UNITS dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB Deg Deg Deg Deg Deg Deg
VS = 2.7V, fCLK = 1MHz, fCUTOFF = 15.625kHz, VIN = 1VP-P, Pin 6 Shorted to Pin 4, External Clock
- 0.12 - 0.25 - 0.65 - 1.1 - 3.6
Filter Phase
VS = 2.7V, fCLK = 4MHz, fCUTOFF = 62.5kHz, Pin 6 Shorted to Pin 4, External Clock
- 114 79 - 83 156
Filter Cutoff Accuracy when Self-Clocked Filter Output DC Swing (Note 6)
REXT = 10.24k from Pin 6 to Pin 7, VS = 3V, Pin 5 Shorted to Pin 4 VS = 3V, Pin 3 = 1.11V
q
1.9 3.9 3.7 8.5
VS = 5V, Pin 3 = 2V
q
VS = 5V, Pin 5 Shorted to Pin 7, RLOAD = 20k
2
U
VP-P VP-P VP-P VP-P VP-P
W
U
U
WW
W
LTC1569-6
ELECTRICAL CHARACTERISTICS
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 3V (V + = 3V, V - = 0V), fCLK = 4.096MHz, fCUTOFF = 64kHz, RLOAD = 10k unless otherwise specified.
PARAMETER Output DC Offset (Note 2) Output DC Offset Drift Clock Pin Logic Thresholds when Clocked Externally CONDITIONS REXT = 10k, Pin 5 Shorted to Pin 7 VS = 3V VS = 5V VS = 5V VS = 3V VS = 5V VS = 5V Min Logical "1" Max Logical "0" Min Logical "1" Max Logical "0" Min Logical "1" Max Logical "0" VS = 3V
q
MIN
TYP 2 6 15 25 25 75 2.7 0.5 4.0 0.5 4.0 0.5 3 3.5
MAX 5 12
UNITS mV mV mV V/C V/C V/C V V V V V V
REXT = 10k, Pin 5 Shorted to Pin 7
VS = 3V VS = 5V VS = 5V
Power Supply Current (Note 3)
fCLK = 256kHz (40k from Pin 6 to Pin 7, Pin 5 Open, / 4), fCUTOFF = 4kHz
4 5 5 6 7 8 11
mA mA mA mA mA mA mA mA mA mA mA mA mVRMS VRMS dB
VS = 5V
q
VS = 10V
q
4.5 8
q
fCLK = 4.096MHz (10k from Pin 6 to Pin 7, Pin 5 Shorted to Pin 4, / 1), fCUTOFF = 64kHz
VS = 3V VS = 5V
q
9 13 12
q
VS = 10V Clock Feedthrough Wideband Noise THD Clock-to-Cutoff Frequency Ratio Max Clock Frequency (Note 4) Min Clock Frequency (Note 5) Input Frequency Range VS = 3V VS = 5V VS = 5V VS = 3V, 5V, TA < 85C VS = 5V Aliased Components <-65dB Pin 5 Open Noise BW = DC to 2 * fCUTOFF fIN = 3kHz, 1.5VP-P, fCUTOFF = 32kHz
17 0.1 95 80 64 5 5 7 1.5 3 0.9 * fCLK
MHz MHz MHz kHz kHz Hz
Note 1: Absolute maximum ratings are those values beyond which the life of a device may be impaired. Note 2: DC offset is measured with respect to Pin 3. Note 3: If the internal oscillator is used as the clock source and the divideby-4 or divide-by-16 mode is enabled, the supply current is reduced as much as 40% relative to the divide-by-1 mode.
Note 4: The maximum clock frequency is arbitrarily defined as the frequency at which the filter AC response exhibits >1dB of gain peaking. Note 5: The minimum clock frequency is arbitrarily defined as the frequecy at which the filter DC offset changes by more than 5mV. Note 6: For more details refer to the Input and Output Voltage Range paragraph in the Applications Information section.
3
LTC1569-6 TYPICAL PERFOR A CE CHARACTERISTICS
Gain vs Frequency
10
1
-10
GAIN (dB)
GAIN (dB)
-30
-50
-70
-90 2.5
10 100 FREQUENCY (kHz)
THD vs Input Frequency
-60 -65 -70 THD (dB) -75 -80 -85 -90 VIN = 1.5VP-P fCUTOFF = 32kHz IN + TO OUT 0 5 10 15 20 25 INPUT FREQUENCY (kHz) 30 VS = 5V PIN 3 = 2V -50 -55 -60 THD (dB) -65 -70 -75 -80 -85 -90
3V Supply Current
10 9 8 DIV-BY-1 ISUPPY (mA) 11 10
ISUPPY (mA)
6 5 4 3 2 0.1
EXT CLK
7 6 5 DIV-BY-16 4 3 DIV-BY-4 EXT CLK
ISUPPY (mA)
7
DIV-BY-16
DIV-BY-4
1 fCUTOFF (kHz)
10
4
UW
100
1569-6 G05
Passband Gain and Group Delay vs Frequency
40
0
36
-1
32
DELAY (s)
-2
28
-3
24
1000
1569-6 G01
-4 0.2
20 1 10 FREQUENCY (kHz) 80
1569-6 GO2
THD vs Input Voltage
VS = 3V PIN 3 = 1.11V
VS = 5V PIN 3 = 2V
fIN = 3kHz fCUTOFF = 32kHz IN + TO OUT 0 0.5 1.0 1.5 2.0 2.5 3.0 INPUT VOLTAGE (VP-P) 3.5 4.0
1569-6 G03
1569-6 G04
5V Supply Current
14
5V Supply Current
12
9 DIV-BY-1 8
DIV-BY-1 10 EXT CLK
8
6
DIV-BY-16
DIV-BY-4
4
0.1 1 fCUTOFF (kHz)
1569-6 G06
10
100
0.1
1 fCUTOFF (kHz)
10
100
1569-6 G07
LTC1569-6
PIN FUNCTIONS
IN +/IN - (Pins 1, 2): Signals can be applied to either or both input pins. The DC gain from IN + (Pin 1) to OUT (Pin 8) is 1.0, and the DC gain from Pin 2 to Pin 8 is -1. The input range, input resistance and output range are described in the Applications Information section. Input voltages which exceed the power supply voltages should be avoided. Transients will not cause latchup if the current into/out of the input pins is limited to 20mA. GND (Pin 3): The GND pin is the reference voltage for the filter and should be externally biased to 2V (1.11V) to maximize the dynamic range of the filter in applications using a single 5V (3V) supply. For single supply operation, the GND pin should be bypassed with a quality 1F ceramic capacitor to V - (Pin 4). The impedance of the circuit biasing the GND pin should be less than 2k as the GND pin generates a small amount of AC and DC current. For dual supply operation, connect Pin 3 to a high quality DC ground. A ground plane should be used. A poor ground will increase DC offset, clock feedthrough, noise and distortion. V -/V + (Pins 4, 7): For 3V, 5V and 5V applications a quality 1F ceramic bypass capacitor is required from V + (Pin 7) to V - (Pin 4) to provide the transient energy for the internal clock drivers. The bypass should be as close as possible to the IC. In dual supply applications (Pin 3 is grounded), an additional 0.1F bypass from V + (Pin 7) to GND (Pin 3) and V - (Pin 4) to GND (Pin 3) is recommended. The maximum voltage difference between GND (Pin 3) and V + (Pin 7) should not exceed 5.5V. DIV/CLK (Pin 5): DIV/CLK serves two functions. When the internal oscillator is enabled, DIV/CLK can be used to engage an internal divider. The internal divider is set to 1:1 when DIV/CLK is shorted to V - (Pin 4). The internal divider is set to 4:1 when DIV/CLK is allowed to float (a 100pF bypass to V - is recommended). The internal divider is set to 16:1 when DIV/CLK is shorted to V + (Pin 7). In the divide-by-4 and divide-by-16 modes the power supply current is reduced by as much as 40%. When the internal oscillator is disabled (RX shorted to V -) DIV/CLK becomes an input pin for applying an external clock signal. For proper filter operation, the clock waveform should be a squarewave with a duty cycle as close as possible to 50% and CMOS voltages levels (see Electrical Characteristics section for voltage levels). DIV/ CLK pin voltages which exceed the power supply voltages should be avoided. Transients will not cause latchup if the fault current into/out of the DIV/CLK pin is limited to 40mA. RX (Pin 6): Connecting an external resistor between the RX pin and V + (Pin 7) enables the internal oscillator. The value of the resistor determines the frequency of oscillation. The maximum recommended resistor value is 40k and the minimum is 3.8k. The internal oscillator is disabled by shorting the RX pin to V - (Pin 4). (Please refer to the Applications Information section.) OUT (Pin 8): Filter Output. This pin can drive 10k and/or 40pF loads. For larger capacitive loads, an external 100 series resistor is recommended. The output pin can exceed the power supply voltages by up to 2V without latchup.
U
U
U
5
LTC1569-6
BLOCK DIAGRA
APPLICATIONS INFORMATION
Self-Clocking Operation
Table1. fCUTOFF vs REXT, VS = 3V, TA = 25C, Divide-by-1 Mode
REXT 3844* 5010* 10k 20.18k 40.2k Typical fCUTOFF N/A N/A 64kHz 32kHz 16kHz Typical Variation of fCUTOFF 3.0% 2.5% 1% 2.0% 3.5%
The LTC1569-6 features a unique internal oscillator which sets the filter cutoff frequency using a single external resistor. The design is optimized for VS = 3V, fCUTOFF = 64kHz, where the filter cutoff frequency error is typically <1% when a 0.1% external 10k resistor is used. With different resistor values and internal divider settings, the cutoff frequency can be accurately varied from 1kHz to 64kHz. As shown in Figure 1, the divider is controlled by the DIV/CLK (Pin 5). Table 1 summarizes the cutoff frequency vs external resistor values for the divide-by-1 mode.
+ 1 IN
OUT V
+
8 7 REXT 6 DIVIDE-BY-16 5 DIVIDE-BY-4 100pF DIVIDE-BY-1 V-
1569-6 F01
2
IN -
LTC1569-6 3 GND V- RX DIV/CLK
V+
4
fCUTOFF =
64kHz (10k/REXT) 1, 4 OR 16
Figure 1
6
U
W
W
IN + 1 10TH ORDER LINEAR PHASE FILTER NETWORK IN - 2 7 V+ REXT GND 3 POWER CONTROL 6 RX 8 OUT V- 4 DIVIDER/ BUFFER 5 DIV/CLK PRECISION OSCILLATOR
1569-6 BD
U
U
*REXT values less than 10k can be used only in the divide-by-16 mode.
In the divide-by-4 and divide-by-16 modes, the cutoff frequencies in Table 1 will be lowered by 4 and 16 respectively. When the LTC1569-6 is in the divide-by-4 and divide-by-16 modes the power is automatically reduced. This results in up to a 40% power savings. The power reduction in the divide-by-4 and divide-by-16 modes, however, effects the fundamental oscillator frequency. Hence, the effective divide ratio will be slightly different from 4:1 or 16:1 depending on VS, TA and REXT. Typically this error is less than 1% (Figures 4 and 6). The cutoff frequency is easily estimated from the equation in Figure 1. Examples 1 and 2 illustrate how to use the graphs in Figures 2 through 7 to get a more precise estimate of the cutoff frequency. Example 1: LTC1569-6, REXT = 20k, VS = 3V, divide-by-16 mode, DIV/CLK (Pin 5) connected to V + (Pin 7), TA = 25C.
LTC1569-6
APPLICATIONS INFORMATION
Using the equation in Figure 1, the approximate filter cutoff frequency is fCUTOFF = 64kHz * (10k/20k) * (1/16) = 2kHz. For a more precise fCUTOFF estimate, use Table 1 to get a value of fCUTOFF when REXT = 20k and use the graph in Figure 6 to find the correct divide ratio when VS = 3V and REXT = 20k. Based on Table 1 and Figure 6, fCUTOFF = 32kHz * (20.18k/20k) * (1/16.02) = 2.01kHz. From Table 1, the part-to-part variation of fCUTOFF will be 2%. From the graph in Figure 7, the 0C to 70C drift of fCUTOFF will be - 0.2% to 0.2%. Example 2: LTC1569-6, REXT = 10k, VS = 5V, divide-by-1 mode, DIV/CLK (Pin 5) connected to V - (Pin 4), TA = 25C.
1.04 1.03 NORMALIZED FILTER CUTOFF 1.02 1.01 1.00 0.99 0.98 0.97 0.96 2 4 6 VSUPPLY (V)
1569-6 F02
NORMALIZED FILTER CUTOFF
REXT = 5k REXT = 10k REXT = 20k REXT = 40k
8
10
Figure 2. Filter Cutoff vs VSUPPLY, Divide-by-1 Mode, TA = 25C
4.08 REXT = 5k REXT = 10k REXT = 20k REXT = 40k DIVIDE RATIO 4.04
NORMALIZED FILTER CUTOFF
4.00
3.96
2
4
6 VSUPPLY (V)
8
10
1569-6 F04
Figure 4. Typical Divide Ratio in the Divide-by-4 Mode, TA = 25C
U
W
U
U
Using the equation in Figure 1, the approximate filter cutoff frequency is fCUTOFF = 64kHz * (10k/10k) * (1/1) = 64kHz. For a more precise fCUTOFF estimate, use Figure 2 to correct for the supply voltage when VS = 5V. From Table 1 and Figure 2, fCUTOFF = 64k * (10k/10k) * 0.970 = 62.1kHz. The oscillator is sensitive to transients on the positive supply. The IC should be soldered to the PC board and the PCB layout should include a 1F ceramic capacitor between V + (Pin 7) and V - (Pin 4) , as close as possible to the IC to minimize inductance. Avoid parasitic capacitance on RX and avoid routing noisy signals near RX (Pin 6). Use
1.010 1.008 1.006 1.004 1.002 1.000 0.998 0.996 0.994 0.992 0.990 -50 -25 0 25 50 TEMPERATURE (C) 75 100
1569-6 F03
VS = 3V VS = 5V VS = 10V
Figure 3. Filter Cutoff vs Temperature, Divide-by-1 Mode, REXT = 10k
1.010 1.008 1.006 1.004 1.002 1.000 0.998 0.996 0.994 0.992 0.990 -50 -25 0 25 50 TEMPERATURE (C) 75 100
1569-6 F05
VS = 3V VS = 5V VS = 10V
Figure 5. Filter Cutoff vs Temperature, Divide-by-4 Mode, REXT = 10k
7
LTC1569-6
APPLICATIONS INFORMATION
16.32 REXT = 5k REXT = 10k REXT = 20k REXT = 40k DIVIDE RATIO 16.16 1.010 1.008 NORMALIZED FILTER CUTOFF 1.006 1.004 1.002 1.000 0.998 0.996 0.994 0.992 15.84 2 4 6 VSUPPLY (V)
1569-6 F06
16.00
8
10
Figure 6. Typical Divide Ratio in the Divide-by-16 Mode, TA = 25C
a ground plane connected to V - (Pin 4) for single supply applications. Connect a ground plane to GND (Pin 3) for dual supply applications and connect V - (Pin 4) to a copper trace with low thermal resistance. Input and Output Voltage Range The input signal range includes the full power supply range. The output range is typically (V - + 50mV) to (V + - 0.8V) when using a single 3V supply with the GND (Pin 3) voltage set to 1.11V. In other words, the output range is typically 2.1VP-P for a 3V supply. Similarly, the output range is typically 3.9VP-P for a single 5V supply when the GND (Pin 3) voltage is 2V. For 5V supplies, the output range is typically 8.5VP-P. The LTC1569-6 can be driven with a single-ended or differential signal. When driven differentially, the voltage between IN + and IN - (Pin 1 and Pin 2) is filtered with a DC gain of 1. The single-ended output voltage OUT (Pin 8) is referenced to the voltage of the GND (Pin 3). The common mode voltage of IN + and IN - can be any voltage that keeps the input signals within the power supply range. For noninverting single-ended applications, connect IN - to GND or to a quiet DC reference voltage and apply the input signal to IN +. If the input is DC coupled then the DC gain from IN + to OUT will be 1. This is true given IN + and OUT are referenced to the same voltage, i.e., GND, V - or some other DC reference. To achieve the distortion levels shown in the Typical Performance Characteristics the
8
U
W
U
U
VS = 3V VS = 5V VS = 10V
0.990 -50
-25
0 25 50 TEMPERATURE (C)
75
100
1569-6 F07
Figure 7. Filter Cutoff vs Temperature, Divide-by-16 Mode, REXT = 10k
input signal at IN + should be centered around the DC voltage at IN -. The input can also be AC coupled, as shown in the Typical Applications section. For inverting single-ended filtering, connect IN+ to GND or to quiet DC reference voltage. Apply the signal to IN -. The DC gain from IN - to OUT is -1, assuming IN - is referenced to IN + and OUT is reference to GND. Refer to the Typical Performance Characteristics section to estimate the THD for a given input level. Dynamic Input Impedance The unique input sampling structure of the LTC1569-6 has a dynamic input impedance which depends on the configuration, i.e., differential or single-ended, and the clock frequency. The equivalent circuit in Figure 8 illustrates the input impedance when the cutoff frequency is 64kHz. For other cutoff frequencies replace the 125k value with 125k * (64kHz/fCUTOFF). When driven with a single-ended signal into IN - with IN + tied to GND, the input impedance is very high (~10M). When driven with a single-ended signal into IN + with IN - tied to GND, the input impedance is a 125k resistor to GND. When driven with a complementary signal whose common mode voltage is GND, the IN+ input appears to have 125k to GND and the IN - input appears to have -125k to GND. To make the effective IN - impedance 125k when driven differentially, place a 62.5k resistor from IN - to GND. For other cutoff frequencies use 62.5k * (64kHz/
LTC1569-6
APPLICATIONS INFORMATION
fCUTOFF), as shown in the Typical Applications section. The typical variation in dynamic input impedance for a given clock frequency is 10%. Wideband Noise The wideband noise of the filter is the RMS value of the device's output noise spectral density. The wideband noise data is used to determine the operating signal-tonoise at a given distortion level. The wideband noise is nearly independent of the value of the clock frequency and excludes the clock feedthrough. Most of the wideband noise is concentrated in the filter passband and cannot be removed with post filtering (Table 2). Table 3 lists the typical wideband noise for each supply.
Table 2. Wideband Noise vs Supply Voltage, Single 3V Supply
Bandwidth DC to fCUTOFF DC to 2 * fCUTOFF DC to fCLK Total Integrated Noise 80VRMS 95VRMS 110VRMS
Table 3. Wideband Noise vs Supply Voltage, fCUTOFF = 64kHz
Power Supply 3V 5V 5V Total Integrated Noise DC to 2 * fCUTOFF 95VRMS 100VRMS 105VRMS
Clock Feedthrough Clock feedthrough is defined as the RMS value of the clock frequency and its harmonics that are present at the filter's OUT pin (Pin 8). The clock feedthrough is measured with IN + and IN - (Pins 1 and 2) grounded and depends on the PC board layout and the power supply decoupling. Table 4 shows the clock feedthrough (the RMS sum of the first 11 harmonics) when the LTC1569-6 is self-clocked with REXT = 10k, DIV/CLK (Pin 5) open (divide-by-4 mode). The clock feedthrough can be reduced with a simple RC post filter.
Table 4. Clock Feedthrough
Power Supply 3V 5V 5V Feedthrough 0.1mVRMS 0.3mVRMS 0.9mVRMS
U
W
U
U
DC Accuracy DC accuracy is defined as the error in the output voltage after DC offset and DC gain errors are removed. This is similar to the definition of the integral nonlinearity in A/D converters. For example, after measuring values of VOUT(DC) vs VIN(DC) for a typical LTC1569-6, a linear regression shows that VOUT(DC) = VIN(DC) * 0.99854 + 0.00134V is the straight line that best fits the data. The DC accuracy describes how much the actual data deviates from this straight line (i.e., DCERROR = VOUT(DC) - (VIN(DC) * 0.99854 + 0.00134V). In a 12-bit system with a full-scale value of 2V, the LSB is 488V. Therefore, if the DCERROR of the filter is less than 488V over a 2V range, the filter has 12-bit DC accuracy. Figure 9 illustrates the typical DC accuracy of the LTC1569-6 on a single 5V supply. DC Offset The output DC offset of the LTC1569-6 is trimmed to less than 5mV. The trimming is performed with VS = 1.9V, -1.1V with the filter cutoff frequency set to 4kHz (REXT = 10k, DIV/CLK shorted to V +). To obtain optimum DC offset performance, appropriate PC layout techniques should be used. The filter IC should be soldered to the PC board. The power supplies should be well decoupled including a 1F ceramic capacitor from V + (Pin 7) to V - (Pin 4). A ground plane should be used. Noisy signals should be isolated from the filter input pins. When the power supply is 3V, the output DC offset should change less than 2mV when the clock frequency varies from 64kHz to 4096kHz. When the clock frequency is fixed, the output DC offset will typically change by less than 3mV (15mV) when the power supply varies from 3V to 5V (5V) in the divide-by-1 mode. In the divide-by4 or divide-by-16 modes, the output DC offset will typically change less than - 9mV (- 27mV) when the power supply varies from 3V to 5V (5V). The offset is measured with respect to GND (Pin 3). Aliasing Aliasing is an inherent phenomenon of sampled data filters. In lowpass filters significant aliasing only occurs when the frequency of the input signal approaches the sampling frequency or multiples of the sampling fre-
9
LTC1569-6
APPLICATIONS INFORMATION
quency. The LTC1569-6 samples the input signal twice every clock period. Therefore, the sampling frequency is twice the clock frequency and 128 times the filter cutoff frequency. Input signals with frequencies near 2 * fCLK fCUTOFF will be aliased to the passband of the filter and appear at the output unattenuated.
488 IN - 2
+
244 DC ERROR (V)
i=
IN + - GND 125k
- -
8 OUT 125k 125k
+
IN + 1
- + Figure 8
-488 -1.5
1569-6 F06
GND 3
TYPICAL APPLICATIO S
Single 3V Operation, AC Coupled Input, 64kHz Cutoff Frequency
0.1F VIN 3V 3.48k 3 2k 1F 4 V
-
1 2
IN + IN -
OUT V+
8 7
VOUT REXT = 10k 3V 1F
GAIN (dB)
0 -10 -20 -30 -40 -50
1569-6 TA02
LTC1569-6 GND RX DIV/CLK 6
5
fCUTOFF =
( )( )
64kHz n=1 10k REXT
n = 1, 4, 16 FOR PIN 5 AT GROUND, OPEN, V +
10
U
W
U
U
U
0
-244 VS = 5V REXT = 10k TA = 25C -1.0 -0.5 0 0.5 VIN DC (V) 1.0 1.5
1569-6 F09
Figure 9
Single 3V, AC Coupled Input, 64kHz Cutoff Frequency
GROUP DELAY
32s 28s 0 10k 20k 30k 40k 50k 60k 24s 70k
-60 -70 -80 -90 0 40k 50k 60k 70k 80k 90k 100k 110k 120k 130k 140k 150k FREQUENCY (Hz)
1569-6 TA02a
LTC1569-6
TYPICAL APPLICATIO S
Single 3V Supply Operation, DC Coupled, 16kHz Cutoff Frequency
VIN 1 IN + 3V 3.48k 3 2k 1F 4 V- DIV/CLK 5 100pF
1569-6 TA04
OUT V+
8 7
2
IN -
LTC1569-6 GND RX 6
fCUTOFF =
( )( )
64kHz n=4 10k REXT
n = 1, 4, 16 FOR PIN 5 AT GROUND, OPEN, V +
Pulse Shaping Circuit for Single 3V Operation, 128kbps 2-Level Data, 64kHz Cutoff Filter
3V 20k 1 128ksps DATA 7.32k* 3V 20k 3.48k 3 2k 1F 4 V- DIV/CLK 5
1569-6 TA06
2
IN -
V+
7
REXT = 10k 3V 1F
GND
RX
6
* SEE APPLICATIONS INFORMATION, "INPUT AND OUTPUT VOLTAGE RANGE"
400mV/DIV
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
Single 5V Operation, 50kHz Cutoff Frequency, DC Coupled Differential Inputs with Balanced Input Impedance
VIN + 5V 3V 1F IN LT(R)1460-2.5 OUT (SOT-23) GND VIN - 1 2 80.6k 3 1F 4 V- DIV/CLK 5
1569-6 TA03
VOUT REXT = 10k
IN + IN -
OUT V+
8 7
VOUT REXT = 12.8k 5V 1F
LTC1569-6 GND RX 6
fCUTOFF ~
( )( )
64kHz n=1 10k 12.8k
n = 1, 4, 16 FOR PIN 5 AT GROUND, OPEN, V +
5V Supply Operation, DC Coupled Filter with External Clock Source
VIN 1 2 IN + IN - OUT V+ 8 7 VOUT fCUTOFF = fCLK/64 5V 0.1F 6 -5V 5V 0V fCLK 5MHz
1569-6 TA05
LTC1569-6 3 0.1F 4 GND V- RX DIV/CLK
-5V
5
1F
2-Level, 128kbps Eye Diagram
IN +
OUT
8
VOUT
LTC1569-6
2s/DIV
1569-6 TA08
11
LTC1569-6
TYPICAL APPLICATIO S
Pulse Shaping Circuit for Single 3V Operation, 200kbps (100ksps) 4-Level Data, 64kHz Cutoff Filter
3V 20k 1 D1 3V D0 9.31k* 20k 2k 1F 4 V- DIV/CLK 5
1569-6 TA06
2 3.48k 3
IN -
V+
7
REXT = 10k 3V 1F
GND
RX
6
* SEE APPLICATIONS INFORMATION, "INPUT AND OUTPUT VOLTAGE RANGE"
400mV/DIV
100ksps DATA
2.49k*
PACKAGE DESCRIPTION
0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP
0.053 - 0.069 (1.346 - 1.752)
0.014 - 0.019 (0.355 - 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.016 - 0.050 (0.406 - 1.270)
RELATED PARTS
PART NUMBER LTC1064-3 LTC1064-7 LTC1069-7 LTC1164-7 LTC1264-7 LTC1562/LTC1562-2 LTC1563-2/LTC1563-3 LTC1569-7 DESCRIPTION Linear Phase, Bessel 8th Order Filter Linear Phase, 8th Order Lowpass Filter Linear Phase, 8th Order Lowpass Filter Low Power, Linear Phase Lowpass Filter Linear Phase, 8th Order Lowpass Filter Universal, 8th Order Active RC Filter Active RC, 4th Order Lowpass Linear Phase DC Accurate, 10th Order COMMENTS fCLK/fCUTOFF = 75/1 or 150/1, Very Low Noise fCLK/fCUTOFF = 50/1 or 100/1, fCUTOFF(MAX) = 100kHz fCLK/fCUTOFF = 25/1, fCUTOFF(MAX) = 200kHz, SO-8 fCLK/fCUTOFF = 50/1 or 100/1, IS = 2.5mA, VS = 5V fCLK/fCUTOFF = 25/1 or 50/1, fCUTOFF(MAX) = 200kHz fCUTOFF(MAX) = 150kHz (LTC1562) fCUTOFF(MAX) = 300kHz (LTC1562-2) fCUTOFF(MAX) = 300kHz, Very Low Noise fCUTOFF(MAX) = 300kHz, No Clock Required
15696f LT/TP 0500 4K * PRINTED IN THE USA
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
U
U
4-Level, 200kbps (100ksps) Eye Diagram
IN +
OUT
8
VOUT
LTC1569-6
2s/DIV
1569-6 TA09
Dimensions in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 - 0.197* (4.801 - 5.004) 8 0.004 - 0.010 (0.101 - 0.254) 0.228 - 0.244 (5.791 - 6.197) 0.150 - 0.157** (3.810 - 3.988) 7 6 5
0.050 (1.270) BSC
1
2
3
4
SO8 1298
(c) LINEAR TECHNOLOGY CORPORATION 1999


▲Up To Search▲   

 
Price & Availability of LTC1569-61

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X